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authorMeng Zhuo <mzh@golangcn.org>2023-06-28 16:45:07 +0800
committerM Zhuo <mzh@golangcn.org>2023-08-22 12:05:36 +0000
commit63ab68ddc5f1307e552cf27ae7a6f0dfda2bb962 (patch)
tree348c81d74ae80a5da5f118c15cb211b561759b94 /test/codegen
parent05f951158278da91a67a2f6380ffbf0c9172f565 (diff)
downloadgo-63ab68ddc5f1307e552cf27ae7a6f0dfda2bb962.tar.xz
cmd/compile: add single-precision FMA code generation for riscv64
This CL adds FMADDS,FMSUBS,FNMADDS,FNMSUBS SSA support for riscv Change-Id: I1e7dd322b46b9e0f4923dbba256303d69ed12066 Reviewed-on: https://go-review.googlesource.com/c/go/+/506616 Reviewed-by: Joel Sing <joel@sing.id.au> Reviewed-by: David Chase <drchase@google.com> TryBot-Result: Gopher Robot <gobot@golang.org> Reviewed-by: Keith Randall <khr@google.com> Run-TryBot: M Zhuo <mzh@golangcn.org>
Diffstat (limited to 'test/codegen')
-rw-r--r--test/codegen/floats.go3
1 files changed, 3 insertions, 0 deletions
diff --git a/test/codegen/floats.go b/test/codegen/floats.go
index 1c5fc8a31a..7991174b66 100644
--- a/test/codegen/floats.go
+++ b/test/codegen/floats.go
@@ -70,17 +70,20 @@ func FusedAdd32(x, y, z float32) float32 {
// s390x:"FMADDS\t"
// ppc64x:"FMADDS\t"
// arm64:"FMADDS"
+ // riscv64:"FMADDS\t"
return x*y + z
}
func FusedSub32_a(x, y, z float32) float32 {
// s390x:"FMSUBS\t"
// ppc64x:"FMSUBS\t"
+ // riscv64:"FMSUBS\t"
return x*y - z
}
func FusedSub32_b(x, y, z float32) float32 {
// arm64:"FMSUBS"
+ // riscv64:"FNMSUBS\t"
return z - x*y
}