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authorJunyang Shao <shaojunyang@google.com>2026-01-22 17:44:32 +0000
committerJunyang Shao <shaojunyang@google.com>2026-01-28 11:06:13 -0800
commit83b232b0af1bd498d3df099eb68e3b1e40df2527 (patch)
tree3d31013c9c8722c0370f970d6b47a7109b37da06 /src/simd
parent6aef900af4eeb4a35d3ff1237a41cf3f63c56c24 (diff)
downloadgo-83b232b0af1bd498d3df099eb68e3b1e40df2527.tar.xz
cmd/compile, simd: capture VAES instructions and fix AVX512VAES feature
The code previously filters out VAES-only instructions, this CL added them back. This CL added the VAES feature check following the Intel xed data: XED_ISA_SET_VAES: vaes.7.0.ecx.9 # avx.1.0.ecx.28 This CL also found out that the old AVX512VAES feature check is not checking the correct bits, it also fixes it: XED_ISA_SET_AVX512_VAES_128: vaes.7.0.ecx.9 aes.1.0.ecx.25 avx512f.7.0.ebx.16 avx512vl.7.0.ebx.31 XED_ISA_SET_AVX512_VAES_256: vaes.7.0.ecx.9 aes.1.0.ecx.25 avx512f.7.0.ebx.16 avx512vl.7.0.ebx.31 XED_ISA_SET_AVX512_VAES_512: vaes.7.0.ecx.9 aes.1.0.ecx.25 avx512f.7.0.ebx.16 It restricts to the most strict common set - includes avx512vl for even 512-bits although it doesn't requires it. Change-Id: I4e2f72b312fd2411589fbc12f9ee5c63c09c2e9a Reviewed-on: https://go-review.googlesource.com/c/go/+/738500 Reviewed-by: Cherry Mui <cherryyz@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Diffstat (limited to 'src/simd')
-rw-r--r--src/simd/archsimd/_gen/simdgen/xed.go5
-rw-r--r--src/simd/archsimd/cpu.go10
-rw-r--r--src/simd/archsimd/ops_amd64.go8
3 files changed, 18 insertions, 5 deletions
diff --git a/src/simd/archsimd/_gen/simdgen/xed.go b/src/simd/archsimd/_gen/simdgen/xed.go
index 5d6fac64d0..2175fa4a8d 100644
--- a/src/simd/archsimd/_gen/simdgen/xed.go
+++ b/src/simd/archsimd/_gen/simdgen/xed.go
@@ -77,7 +77,8 @@ func loadXED(xedPath string) []*unify.Value {
switch {
case inst.RealOpcode == "N":
return // Skip unstable instructions
- case !(strings.HasPrefix(inst.Extension, "AVX") || strings.HasPrefix(inst.Extension, "SHA") || inst.Extension == "FMA"):
+ case !(strings.HasPrefix(inst.Extension, "AVX") || strings.HasPrefix(inst.Extension, "SHA") ||
+ inst.Extension == "FMA" || inst.Extension == "VAES"):
// We're only interested in AVX and SHA instructions.
return
}
@@ -796,6 +797,7 @@ var cpuFeatureMap = map[string]string{
"AVXAES": "AVXAES",
"SHA": "SHA",
"FMA": "FMA",
+ "VAES": "VAES",
// AVX-512 foundational features. We combine all of these into one "AVX512" feature.
"AVX512F": "AVX512",
@@ -829,6 +831,7 @@ func init() {
"AVXAES": {Virtual: true, Implies: []string{"AVX", "AES"}},
"FMA": {Implies: []string{"AVX"}},
+ "VAES": {Implies: []string{"AVX"}},
// AVX-512 subfeatures.
"AVX512BITALG": {Implies: []string{"AVX512"}},
diff --git a/src/simd/archsimd/cpu.go b/src/simd/archsimd/cpu.go
index 8069ee7f26..a25556ae65 100644
--- a/src/simd/archsimd/cpu.go
+++ b/src/simd/archsimd/cpu.go
@@ -158,3 +158,13 @@ func (X86Features) FMA() bool {
func (X86Features) SHA() bool {
return cpu.X86.HasSHA
}
+
+// VAES returns whether the CPU supports the VAES feature.
+//
+// If it returns true, then the CPU also supports AVX.
+//
+// VAES is defined on all GOARCHes, but will only return true on
+// GOARCH amd64.
+func (X86Features) VAES() bool {
+ return cpu.X86.HasVAES
+}
diff --git a/src/simd/archsimd/ops_amd64.go b/src/simd/archsimd/ops_amd64.go
index ec50cc72c5..9c5bb22eee 100644
--- a/src/simd/archsimd/ops_amd64.go
+++ b/src/simd/archsimd/ops_amd64.go
@@ -19,7 +19,7 @@ func (x Uint8x16) AESDecryptLastRound(y Uint32x4) Uint8x16
// y is the chunk of dw array in use.
// result = AddRoundKey(InvShiftRows(InvSubBytes(x)), y)
//
-// Asm: VAESDECLAST, CPU Feature: AVX512VAES
+// Asm: VAESDECLAST, CPU Feature: VAES
func (x Uint8x32) AESDecryptLastRound(y Uint32x8) Uint8x32
// AESDecryptLastRound performs a series of operations in AES cipher algorithm defined in FIPS 197.
@@ -45,7 +45,7 @@ func (x Uint8x16) AESDecryptOneRound(y Uint32x4) Uint8x16
// y is the chunk of dw array in use.
// result = AddRoundKey(InvMixColumns(InvShiftRows(InvSubBytes(x))), y)
//
-// Asm: VAESDEC, CPU Feature: AVX512VAES
+// Asm: VAESDEC, CPU Feature: VAES
func (x Uint8x32) AESDecryptOneRound(y Uint32x8) Uint8x32
// AESDecryptOneRound performs a series of operations in AES cipher algorithm defined in FIPS 197.
@@ -71,7 +71,7 @@ func (x Uint8x16) AESEncryptLastRound(y Uint32x4) Uint8x16
// y is the chunk of w array in use.
// result = AddRoundKey((ShiftRows(SubBytes(x))), y)
//
-// Asm: VAESENCLAST, CPU Feature: AVX512VAES
+// Asm: VAESENCLAST, CPU Feature: VAES
func (x Uint8x32) AESEncryptLastRound(y Uint32x8) Uint8x32
// AESEncryptLastRound performs a series of operations in AES cipher algorithm defined in FIPS 197.
@@ -97,7 +97,7 @@ func (x Uint8x16) AESEncryptOneRound(y Uint32x4) Uint8x16
// y is the chunk of w array in use.
// result = AddRoundKey(MixColumns(ShiftRows(SubBytes(x))), y)
//
-// Asm: VAESENC, CPU Feature: AVX512VAES
+// Asm: VAESENC, CPU Feature: VAES
func (x Uint8x32) AESEncryptOneRound(y Uint32x8) Uint8x32
// AESEncryptOneRound performs a series of operations in AES cipher algorithm defined in FIPS 197.