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authorCherry Mui <cherryyz@google.com>2021-06-09 14:29:20 -0400
committerCherry Mui <cherryyz@google.com>2021-06-11 20:52:41 +0000
commitc93d5d1a5245d4baa6824a2c88a6b79e3d895e4d (patch)
treecdf4a2cba2535025be65dd368bdd0aaf93d233b9 /src/runtime/asm_amd64.s
parent2fe324858b31a672070f8529191d0769013b8488 (diff)
downloadgo-c93d5d1a5245d4baa6824a2c88a6b79e3d895e4d.tar.xz
[dev.typeparams] all: always enable regabig on AMD64
Always enable regabig on AMD64, which enables the G register and the X15 zero register. Remove the fallback path. Also remove the regabig GOEXPERIMENT. On AMD64 it is always enabled (this CL). Other architectures already have a G register, except for 386, where there are too few registers and it is unlikely that we will reserve one. (If we really do, we can just add a new experiment). Change-Id: I229cac0060f48fe58c9fdaabd38d6fa16b8a0855 Reviewed-on: https://go-review.googlesource.com/c/go/+/327272 Trust: Cherry Mui <cherryyz@google.com> Run-TryBot: Cherry Mui <cherryyz@google.com> Reviewed-by: Than McIntosh <thanm@google.com> Reviewed-by: David Chase <drchase@google.com> TryBot-Result: Go Bot <gobot@golang.org>
Diffstat (limited to 'src/runtime/asm_amd64.s')
-rw-r--r--src/runtime/asm_amd64.s16
1 files changed, 0 insertions, 16 deletions
diff --git a/src/runtime/asm_amd64.s b/src/runtime/asm_amd64.s
index f8f5fc62e6..50ffa30ac5 100644
--- a/src/runtime/asm_amd64.s
+++ b/src/runtime/asm_amd64.s
@@ -683,10 +683,6 @@ TEXT runtime·jmpdefer(SB), NOSPLIT, $0-16
// or else unwinding from systemstack_switch is incorrect.
// Smashes R9.
TEXT gosave_systemstack_switch<>(SB),NOSPLIT,$0
-#ifndef GOEXPERIMENT_regabig
- get_tls(R14)
- MOVQ g(R14), R14
-#endif
MOVQ $runtime·systemstack_switch(SB), R9
MOVQ R9, (g_sched+gobuf_pc)(R14)
LEAQ 8(SP), R9
@@ -1284,10 +1280,8 @@ aes65to128:
PXOR X10, X8
PXOR X11, X9
PXOR X9, X8
-#ifdef GOEXPERIMENT_regabig
// X15 must be zero on return
PXOR X15, X15
-#endif
#ifdef GOEXPERIMENT_regabiargs
MOVQ X8, AX // return X8
#else
@@ -1408,10 +1402,8 @@ aesloop:
PXOR X10, X8
PXOR X11, X9
PXOR X9, X8
-#ifdef GOEXPERIMENT_regabig
// X15 must be zero on return
PXOR X15, X15
-#endif
#ifdef GOEXPERIMENT_regabiargs
MOVQ X8, AX // return X8
#else
@@ -1595,13 +1587,11 @@ TEXT runtime·addmoduledata(SB),NOSPLIT,$0-0
// signals. It is quite painful to set X15 in the signal context,
// so we do it here.
TEXT ·sigpanic0(SB),NOSPLIT,$0-0
-#ifdef GOEXPERIMENT_regabig
get_tls(R14)
MOVQ g(R14), R14
#ifndef GOOS_plan9
XORPS X15, X15
#endif
-#endif
JMP ·sigpanic<ABIInternal>(SB)
// gcWriteBarrier performs a heap pointer write and informs the GC.
@@ -1619,13 +1609,7 @@ TEXT runtime·gcWriteBarrier<ABIInternal>(SB),NOSPLIT,$112
MOVQ R13, 104(SP)
// TODO: Consider passing g.m.p in as an argument so they can be shared
// across a sequence of write barriers.
-#ifdef GOEXPERIMENT_regabig
MOVQ g_m(R14), R13
-#else
- get_tls(R13)
- MOVQ g(R13), R13
- MOVQ g_m(R13), R13
-#endif
MOVQ m_p(R13), R13
MOVQ (p_wbBuf+wbBuf_next)(R13), R12
// Increment wbBuf.next position.